During the manufacture of integrated circuits, electrical components are formed on a semiconductor substrate through a number of process steps. For example, a typical process for forming metal oxide semiconductor ("MOS") transistors includes the steps of forming an oxide layer on a surface of a silicon substrate, masking portions of the oxide layer, removing unmasked portions of the oxide, and doping regions of the silicon substrate exposed by the removed portions of the oxide layer. After the formation of the MOS transistors and other desired components, the resulting structure is patterned to form contact holes over portions of the components. For example, a contact hole may be formed over a source or drain region of a MOS transistor. A contact is then formed by depositing a conductive layer in the contact holes to provide interconnection among the components fabricated on the substrate.
FIG. 1 illustrates a conventional contact hole 20 formed in an oxide layer 22 deposited on a surface of a silicon substrate 24. The contact hole 20 is formed by removing a portion of the oxide layer 22 by, for example, etching or other suitable process means. A small n+-type silicon region 26 is shown formed in the substrate 24 under the contact hole 20 and may correspond, for example, to a source or drain region of a MOS transistor (not shown in FIG. 1), as understood by one skilled in the art. A contact must be formed in the contact hole 20 to provide electrical connection between the n+-type region 26 and other components formed in the substrate 24. FIG. 2 illustrates the formation of a contact to the region 26 through an aluminum layer 28 deposited in the contact hole 20 and on the oxide layer 22 through known processes, such as physical vapor deposition (PVD). Although shown as being deposited directly on the silicon n+-type region 26, one skilled in the art will realize the aluminum layer 28 cannot be deposited directly on the region 26 due to the formation of an eutectic alloy at the silicon-aluminum junction of the region 26 and layer 28. As understood by one skilled in the art, the silicon-aluminum junction must be annealed to provide a good ohmic contact between the region 26 and layer 28. An ohmic contact is one that has linear voltage and current characteristics defined by Ohm's law, as understood by one skilled in the art. During this annealing, the eutectic alloy is formed from the silicon in the region 26 and the aluminum in the layer 28. The alloy may melt down into the substrate 24 beyond the region 26 as illustrated by the dotted line 32 and thereby destroy the region 26.
One solution to the eutectic alloy problem resulting at a silicon-aluminum junction is illustrated in FIG. 3. A barrier layer 34, such as titanium nitride (TiN), is deposited on the region 26 before the aluminum layer 28. The barrier layer 34 physically isolates the region 26 from the layer 28, preventing the silicon-aluminum eutectic alloy from forming as understood by one skilled in the art. Although the deposition of the barrier layer 34 prevents formation of the eutectic alloy, it also results in an increased resistivity of the contact and of the conductive layer 36 over the oxide layer 22. This is true because a composite contact layer 36 comprising the layers 28 and 34 has a higher resistivity than the resistivity of the aluminum layer 28 alone due to the higher resistivity of the titanium nitride layer 34.
FIG. 4 illustrates an alternative contact structure which eliminates the problems of the unwanted portions of the barrier layer 34 on the oxide layer 22. In FIG. 4, a titanium suicide TiSi.sub.2 layer 38 is selectively formed on the surface of the n+-type region 26 through known selective processes, such as selective chemical vapor deposition ("CVD"). The formation of such a titanium silicide layer 38 is highly selective, with no titanium silicide being formed on the surface of the oxide layer 22. As shown in FIG. 4, the titanium silicide layer 38 extends beneath the surface of the substrate 24 and into the small n+-type region 26. This is true because formation of the titanium silicide layer 38 consumes some of the silicon in the n+-type region 26 as understood by those skilled in the art. The aluminum layer 28 is thereafter deposited on the surfaces of the oxide layer 22 and titanium silicide layer 38 to form the contact.
In the structure of FIG. 4, the formation of the aluminum layer 28 on the titanium silicide layer 38 again results in a eutectic alloy forming in the substrate region 26 due to the reaction of silicon in this region with aluminum from the layer 28. Such an alloy could extend down to the substrate region 24, thereby destroying the region 26, as shown by the dotted line 40. A titanium nitride barrier layer 34 could be deposited over the titanium silicide layer 38 and oxide layer 22 as previously described preventing the silicon-aluminum alloy from forming at the junction of the layers 28 and 38. However, the formation of such a barrier layer 34 undesirably increases the resistivity of the contact and the portions of the conductive layer over the oxide layer 22. To prevent these problems, additional process steps are required to remove the unwanted portions of the barrier layer. Alternatively, the thickness of the titanium silicide layer 38 may be increased so the alloy has farther to travel before entering and destroying the n+-type region 26. The allowable thickness of the titanium silicide layer 38 is limited, however, in that the amount of silicon consumed from the region 26 during formation of the layer 38 cannot be so great that the layer 38 extends through the region 26.
There is a need for selectively forming contacts in a semiconductor integrated circuit.